As computer applications grow increasingly complex, hardware architecture is increasingly burdened by the requirements of higher speed and taking up less space, while also trying to avoid becoming unworkably complex. One way to reduce resource usage is to use components and functionalities for multiple uses. The present application considers the sharing of components/functionalities to perform both division and square root calculations. To understand the components/functionalities involved, performing division by computer is first discussed below.
Like most calculations performed by processors, division is implemented as an iterative process. One category of division iterative processes, or algorithms, are digit recurrence algorithms, which use subtraction to obtain the quotient/remainder. “Restoring” digit recurrence algorithms is similar to the iterative process of division by paper and pencil, where it is sometimes required to restore the original dividend by adding the divisor to it. Intuitively, it can be seen this requires a certain amount of memory, and, if dividing two n-digit numbers, can result in 2n additions/subtractions being performed.
“Nonrestoring” digit recurrence algorithms eliminate the restoration cycles, and only require up to n additions. This is accomplished by representing the quotient as a digital set of positive and negative integers, such as, e.g., {−1,+1}, which is converted into binary form. In this way, small errors in one iteration can be corrected in subsequent iterations. Sweeney, Robinson, and Tocher (SRT) division, which is widely used in computing, is a special set of nonrestoring digital recurrence algorithms which use a lookup table (LUT) rather than computing certain iterative calculations. See, e.g., D. Atkins, Higher-Radix Division Using Estimates of the Divisor and Partial Remainders, IEEE Transactions on Computers, vol. C-17, No. 10, pp. 925-934 (October 1968), the entire contents of which are incorporated herein by reference.
The recursive/iterative relationship used in division can be represented as shown in Equation (1):pj+1=rpj−qj+1d  (1)
where:
j=the recursive index=0, 1, . . . , m−1
pj=the partial remainder used in the jth cycle
p0=the dividend
pm=the remainder
qj=the jth quotient digit in which the quotient is in the form:

m=the number of digits, radix r, in the quotient
d=the divisor
r=the radix.
The radix r of the algorithm, typically chosen to be a power of 2, determines how many quotient bits are retired in each iteration, such that r=2b. Accordingly, a radix r algorithm requires [n/b] iterations to compute an n digit quotient. Each iteration of the division recurrence comprises the following steps:                1) determine next quotient-digit qj+1 by the quotient-digit selection function;        2) generate the product qj+1×d; and        3) subtract qj+1×d from r×pj to form the next partial remainder.        
In SRT division, the quotient-digit function in step 1 is implemented by a LUT, known as a partial remainder-divisor (PD) table, as the LUT is based on the partial remainder and the divisor calculated in each iteration. See, e.g., Oberman and Flynn, Minimizing the Complexity of SRT Tables, IEEE Transactions of VLSI Systems, vol. 6, no. 1, pp. 141-149 (March 1998) (“Oberman and Flynn 1998”), the entire contents of which are incorporated herein by reference.
The square root function can be similarly implemented by an iterative process, in which the radicand is similar to the dividend, the partial radicand is similar to the partial remainder, and the root is similar in formation to the quotient. See, e.g., J. Fandrianto, Algorithm for High Speed Shared Radix 4 Division and Radix 4 Square Root, IEEE Symposium on Computer Arithmetic 1987, pp. 73-79 (“Fandrianto et al. 1987”), and J. Fandrianto, Algorithm for High Speed Shared Radix 8 Division and Radix 8 Square Root, IEEE Symposium on Computer Arithmetic 1989, pp. 68-75 (“Fandrianto et al. 1989”), the entire contents of both of which are incorporated herein by reference.